IGNOU MCA MCS-012 Computer Organisation and Assembly Language Programming SOLVED ASSIGNMENTS 2014-2015

IGNOU SOLVED ASSIGNMENTS FOR 1st Semester MCS-012 2014-2015 Computer Organisation and Assembly Language Programming

Ans: Comming soon. Now follow - How to write Best ASSIGNMENTS / ANSWERS by Yourself

Q.1 

  (a) Perform the following arithmetic operations using binary signed 2‟s complement notation for integers. You may assume that the maximum size of integers is of 9 bits including the sign bit. (Please note that the numbers given here are in decimal notation). i) Add – 256 and 206 ii) Subtract 224 from –99 iii) Add 124 and 132 Please indicate the overflow if it occurs. Also write how you identify overflow.

(b) Convert the hexadecimal number: ( ABCD01)h into equivalent binary, octal and decimal. 

(c) Convert the following string into equivalent “UTF 8” code – “DNS uses domains like .com, .au etc.”. Are these UTF 8 codes same as that used in ASCII?

(d) Use a Karnaugh's map to design a odd parity generator circuit for 4 input bits.

(e ) An 8 bit data 10110011 after transmission is received as 10010011. Explain how SEC code will detect and correct this problem.

(f) Design a two-bit counter (a sequential circuit) that counts from 00 to 11. You should show the state table, state diagram, the k-map for circuit design and logic diagram of the resultant design using D flipflop.

(g) Explain the single precision floating point single IEEE 754 representation. Represent the number (63.125) 10 using IEEE 754 single precision and double precision representations.  

Q.2

(a) A RAM has a capacity of 1024K having the word size of 64 bits and supports only word addresses.

         (i) How many data input and output lines does this RAM need? Explain your answer. 

         (ii) How many address lines will be needed for this RAM? Explain.

 (b) A computer have 512 words RAM with a word size of 32 bits and a cache memory of 8 Blocks with block size of 64 bits. Draw a diagram to show the address mapping of RAM and Cache, if 

         (i) Direct cache mapping is used 

         (ii) Associative cache mapping is used, and 

         (iii) Two way set associative mapping scheme is used.  

(c) What is the need of DMA, even though computer have Interrupt Driven I/O mechanism? How is DMA different to I/O processors? Explain with the help of a diagram. Suggest which I/O technique will be used for each of the following situation. Give justification in support of your answer.

         (i) Data input by a user during execution of a program. 

         (ii) Input of a stream of data over a data Communication line over a network.

(d) How are tracks and sectors organised on a magnetic disk? How does the organisation of sectors on magnetic disk differ from CD ROM? Explain with the help of diagram. What is rotational latency in the context of disk access time? Assume that the disk rotates at 6000 rpm; each track of the disk has 16 sectors; data transfer rate of the disk is 64 MB/second; and average seek time of disk is10 millisecond. Calculate the average access time for the disk. 

(e) What is the need of interfaces like SCSI and IDE in a computer system? Assume that you are purchasing a computer with high-end graphics capability, which of the two interfaces would you use for such computer? Justify your answer.

(f) Define each of the following terms. Explain the main purpose / use / advantage. (Word Limit for answer of each part is 50 words ONLY). 

       (i) Refresh Rate in the context of displays 

       (ii) Liquid crystal displays 

       (iii) Scan codes in the context of keyboard

       (iv) Graphic Accelerators

        (v) Classification of printers 

        (vi) SMPS

Question 3

 (a) Assume that a new machine has been developed. This machine has 64 general purpose registers    of 64 bits each. Out of these 64 registers, 32 registers are used as stack for subroutine calls. The    machine has 1 GB main memory with memory word size of 64 bits. The Instructions of this machine  is only one memory word. An instruction of the machine consists of opcode - 6 bits, addressing  mode specification - 2 bits and remaining bits for specifying the operand addresses. An ADD  instruction on this machine has a fixed opcode 110011. The four possible addressing modes for the  ADD instruction are coded using the 2 bit addressing mode field. Each ADD instruction involves  three operands with at least one of the operand as register operand. Design four ADD instructions,  involving at least four different types of addressing modes. Give justification of the selection of  every addressing mode.

(b) A hypothetical 16 bit machine has PC, AC, MAR, IR, DR and Flag registers (You may assume the roles of these registers same as that are defined in general for a von Neumann machine). The instructions of this machine contain only one operand address which is a memory operand. On execution, the memory operand is first brought into the DR register. The second operand, if required, can be stored in AC register and the result of the operation is also stored in the AC register, if needed. The machine has the following instruction:

                   STORE memAddress                     // this instruction result in storage of the

                                                                            content of AC register into the memory

                                                                             location specified by memAddress. 

Write and explain the sequence of micro-operations that are required to fetch and execute this instruction Make and state suitable assumptions, if any.

(c) Assume that you have a machine as shown in section 3.2.2 of Block 3 having the micro-operations as given in Figure 10 on page 62 of Block 3. Consider that R1 and R2 both are 8 bit registers and contains 0001 1100 and 0111 1110 respectively. What will be the values of select inputs, carry-in input and result of operation (including carry out bit) if the following micro-operations are performed? (For each microoperation you may assume the initial value of R1 and R2 as given above). 

    (i) Addition of R1 and R2 

    (ii) Exclusive OR of R1 and R2 

    (iii)Shift left R2 once 

    (iv)Decrement R1  

(d) Compare and contrast the operations of Wilkes control Unit to that of Micro-programmed control Unit.

(e) What is the need of Instruction pipelining? Explain the instruction pipeline with the help of a diagram. Explain the problems of using instruction pipelining.

(f) Assume that a RISC machine has 64 registers out of which 16 registers are reserved for the Global variables. This machine has been designed to have 8 registers for storing two input parameters, two output parameters and four local variables for a single function. Explain with the help of a diagram, how the overlapped register window can be implemented in this machine for procedure calls. Explain the process of parameter passing for the subroutine call on this machine. 

Question 4

(a) Write a program in 8086 assembly Language (with proper comments) to count the number of those alphabets that are same as well as are at the same position in two different strings. For example, in case the strings are: "ABCDEFGHIJ" and "BDCDABCDEF", this count is 2, as the 3rd and 4th positions in both the strings contains C and D, respectively. You may assume that both the strings are available in the memory and are of length 10. Make suitable assumptions, if any. 

(b) Write a program in 8086 assembly language to convert a four digit packed BCD number into equivalent ASCII digits. The packed BCD number may be assumed to be stored in memory. Your program should print the four ASCII digits.

(c) Write a simple near procedure in 8086 assembly language that receives one 16 bit number as parameter value on the stack from the main module. It returns 0 if the upper byte of the number is 0, else returns 1. Make suitable assumptions, if any.